Andreetti Luca

Graduated cum laude in Computer Engineering at the University of Bologna in 2025, where he also earned his Bachelor's degree in the same field. For his master’s thesis, he carried out a six-month research project at the German Aerospace Center (DLR) in Munich, where he studied the performance of the QUIC protocol as a Convergence Layer for Delay-Tolerant Networks, both in satellite and space exploration environments. With a strong aptitude for teamwork and a continuous commitment to professional and personal development, he is now starting working at the HPC department of CINECA.