Cesarini Daniele

Dr. Cesarini is a Project Manager & HPC Technology Specialist at the HPC department of CINECA where his works is focused on the design of the next-generation HPC architectures to define the strategic roadmap of Italian and European supercomputers. He is Vice-chair for Research of ETP4HP and he serves in the scientific advisory board of EuroHPC JU (RIAG). He manages for CINECA several European founded projects (EPI-SGA1, EPI-SGA2, EUPEX, REGALE, etc.) and national projects of the Italian Recovery and Resilience Plan (PNRR). He graduated in Computer Engineering from the University of Bologna (Italy) in 2014, where he also earned his Ph.D. in Electronics, Telecommunications, and Information Technologies Engineering in 2019.